The present invention relates to a multiprocessor system, and more particularly to a synchronous apparatus suitable for synchronizing processors.
Conventional synchronous processing for multi-processors basically adopts a synchronizing (or process ordering) scheme for tasks wherein tasks are processed based on a task driven order or a data driven order. In case of general purpose multi-processors, a data flow processing scheme or a token control scheme has been adopted wherein task end flags are provided in a common memory in order for each task to check if all necessary preceding task processes have been completed.
A synchronous processing of this type is described in Japanese publication "Multi-microprocessor System", pp. 117 to 122, Keigaku Shuppan, November 1984.
An example of conventional apparatus for a multi-processor system is disclosed in U.S. Pat. No. 4,493,053.
Conventional technology for general purpose multi-processor systems relies largely upon software and requires a number of items to be checked, thus leading to a large overhead for synchronous processing among tasks (i.e. regulating the priority order of task processing) or processors. Therefore, there arises some problems that tasks cannot be divided in pieces and the task processing order in its parallel operation is restricted unduly. Parallel processing of jobs cannot be positively used, thus resulting in a hardship in attaining high efficiency.